PCB EMC設(shè)計首要考慮的10個因素（1）

EMC設(shè)計首要考慮的10個因素 隨著高速電路需求的日益增加，PCB設(shè)計變得越來越富有挑戰(zhàn)性。除了PCB的實際邏輯設(shè)計，工程師還必須考慮其他幾個影響電路的方面，如功耗、PCB大小、環(huán)境噪聲、以及電磁兼容（EMC）。本文將介紹硬件工程師如何在PCB設(shè)計階段解決電磁兼容問題，使系統(tǒng)不受電磁干擾影響。1. Ground Planes – A low inductance ground system is the most vital element when designing a PCB for minimizing EMC. Maximizing the ground area on a PCB reduces the inductance of ground in the system， which in turn reduces electromagnetic emissions and crosstalk.復(fù)制代碼鋪地層 —— 在進行PCB板設(shè)計時低感應(yīng)系數(shù)的接地系統(tǒng)對于最小化EMC來說是最重要的元素。最大化PCB鋪地面積可以減少系統(tǒng)中鋪地自感應(yīng)，從而減少電磁輻射和干擾。 Signals can be connected to ground using different methods. A poor PCB design is one where components are connected randomly to ground points. Such a design generates high ground inductance and leads to unavoidable EMC issues.復(fù)制代碼信號可以用不同的方法連接到地。一個比較差的PCB設(shè)計就是器件隨便地連接到接地點。這樣的設(shè)計會產(chǎn)生高的自感應(yīng)，從而導(dǎo)致不可避免的EMC問題。 A recommended design approach is to have a full ground plane as it provides the lowest impedance as the current returns back to its source. However， a ground plane requires a dedicated PCB layer which may not be feasible for two-layer PCBs.In such case， designers are recommended to use ground grids as shown in Figure 1a. The inductance of ground in this case will depend on the spacing between the grids.復(fù)制代碼推薦的設(shè)計方法是，用一整層鋪地，這是因為電流回到源端時阻抗很低。然而，專門有一層來鋪地對于兩層PCB來說是不切合實際的。在這種情況下，建議設(shè)計者們使用如圖1所示的鋪地網(wǎng)格。在這種情況下地的自感應(yīng)取決于網(wǎng)格之間的距離。 The way a signal returns to system ground is also very important because when a signal takes a longer path， it creates a ground loop which forms an antenna and radiates energy. Thus， every trace carrying current back to the source should follow the shortest path and must go directly to the ground plane. Connecting all the individual grounds and then connecting them to the ground plane is not advisable because it not only increases the size of current loop but also increases the probability of ground bouncing.Figure 1b shows the recommended method of connecting components to the ground plane.復(fù)制代碼信號連接到系統(tǒng)地的方式也很重要，因為當(dāng)信號路徑過長，它就構(gòu)成了一個地環(huán)路，會形成天線和輻射能量。因此，每一個載流回源線跡都應(yīng)遵循最短路徑，必須直接連接地平面。連接單個的地，然后將它們連接到鋪地平面是不可取的，因為它不僅增加了電流環(huán)路的尺寸，而且還提高了ground bouncing的概率。圖1 b顯示了器件連接到地平面的推薦方法。 Using a Faraday’s cage is another good mechanism for reducing the problems caused by EMC. A Faraday cage is formed by stitching the ground on the complete periphery of the PCB and not routing any signal outside this boundary (see Figure 1c). This mechanism restricts the emission/interference from/to the PCB within/outside the boundary defined by the cage.復(fù)制代碼使用法拉第籠是另一個可以減少EMC引起問題的不錯機制。法拉第籠構(gòu)成是這樣的，在整個PCB邊界打一些小孔連接到地，邊界外面不布任何信號 (參見圖1 c)。這一機制可以制約來自定義的籠里面PCB的輻射/干擾，并阻止籠外面的輻射/干擾影響PCB。2. Component Segregation – For an EMC-free design， components on the PCB need to be grouped according to their functionality， such as analog， digital， power supply sections， low-speed circuits， high-speed circuits， and so on. The tracks for each group should stay in their designated area. For a signal to flow from one subsystem to another， a filter should be used at subsystem boundaries.復(fù)制代碼器件隔離 —— 對于一個沒有電磁干擾的設(shè)計，PCB上的元器件需要按照功能分組，如模擬、數(shù)字、電源部分，低速電路、高速電路等。每組的布線應(yīng)該保持在指定的區(qū)域。對于從一個子系統(tǒng)流到另一個子系統(tǒng)的信號，應(yīng)該在子系統(tǒng)的邊界放一個濾波器。3. Board Layers – Proper arrangement of the layers is vital from an EMC point of view. If more than two layers are used， then one complete layer should be used as a ground plane. In the case of a four-layer board， the layer below the ground layer should be used as a power plane (Figure 2a shows one such arrangement). Care must be taken that the ground layer should always be between high-frequency signal traces and the power plane. If a two-layer board is used and a complete layer of ground is not possible， then ground grids should be used.If a separate power plane is not used， then ground traces should run in parallel with power traces to keep the supply clean.復(fù)制代碼板層 —— 從EMC角度來看，PCB板層結(jié)構(gòu)尤為重要。如果PCB超過兩層，那么應(yīng)該有一個整層用來鋪地。在四層板的情況下，鋪地層下面應(yīng)是電源層(圖2a顯示了這種結(jié)構(gòu))。必須注意，在高頻信號和電源層之間應(yīng)該有鋪地層。如果為雙層板設(shè)計，不可能有整個鋪地層，那么應(yīng)該使用鋪地網(wǎng)格。如果不是獨立的電源層，那么應(yīng)該使用地線和電源線平行來保持供電干凈。4. Digital Circuits – When dealing with digital circuits， extra attention must be given to clocks and other high-speed signals. Traces connecting such signals should be kept as short as possible and be adjacent to the ground plane to keep radiation and crosstalk under control. With such signals， engineers should avoid using vias or routing traces on the PCB edge or near connectors. These signals must also be kept away from the power plane since they are capable of inducing noise on the power plane as well.While routing traces for an oscillator， apart from ground no other trace should run in parallel or below the oscillator or its traces.The crystal should also be kept close to the appropriate chips.復(fù)制代碼數(shù)字電路 —— 在處理數(shù)字電路時，需要特別注意時鐘和其他高速信號。連接此類信號的走線應(yīng)保持盡可能短，并靠近鋪地層以保持輻射和干擾在控制之下。對于這種信號，工程師應(yīng)避免使用過孔或者在PCB邊緣和靠近連接器的位置走線。這些信號應(yīng)該遠離電源層，因為它們也會在電源層產(chǎn)生噪聲。當(dāng)給晶振布線時，除了地，其他任何走線都不能與時鐘線平行或布在晶振下面。晶體還應(yīng)該盡量靠近需要時鐘的器件。 It is also worth noting that return current always follows the least reactance path.Therefore， ground traces carrying return current should be kept close to the trace carrying its associated signal to keep the current loop as short as possible.Traces carrying differential signals should run close to each other to most effectively use the advantage of magnetic field cancellation.復(fù)制代碼值得一提的是，電流返回總是沿著阻抗最低的路徑。因此，承載返回電流的地線應(yīng)和相關(guān)的信號布線盡量靠近，以保持電流環(huán)路盡可能地短。差分信號布線應(yīng)該盡可能靠近對方，最有效地利用磁場抵消的優(yōu)勢。5. Clock Termination – Traces carrying clock signals from a source to a device must have matching terminations because whenever there is an impedance mismatch， a part of the signal gets reflected. If proper care is not provided to handle this reflected signal， larges amount of energy will be radiated. There are multiple forms of effective termination， including source termination， end termination， AC termination， etc.復(fù)制代碼時鐘匹配 —— 從源端到器件的時鐘線必須完全匹配，因為每當(dāng)有阻抗失配的情況下，就會有部分信號反射。如果沒有適當(dāng)處理反射信號，就會有很大的能量輻射出去。有很多種有效的匹配方式，包括源端匹配，終端匹配，AC匹配等。