STM32利用DMA 和FSMC驅(qū)動(dòng)ISSI 25616 外部SRAM 成功
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去年把STM32的DMA試了一下，好像用過了M2M模式，測(cè)試時(shí)從STM32 自帶的FLASH to RAM，使用的32bit寬度數(shù)據(jù)，測(cè)試成功，然后又用了DMA給DAC送數(shù)據(jù)，產(chǎn)生方波，三角波，正弦波等。
用過DMA后就用了FSMC驅(qū)動(dòng)9325TFT，由于當(dāng)時(shí)不知道液晶上標(biāo)的引腳有錯(cuò)誤，一直不成功，郁悶好久，最后才知道，參考了一下網(wǎng)上的程序，成功用了CPU 加FSMC驅(qū)動(dòng)了TFT，不用IO口模擬。
既然TFT驅(qū)動(dòng)成功了，然后我就很想用FSMC總線驅(qū)動(dòng)板子上的ISSI 25616 的512Kb外部SRAM，但是經(jīng)過我的很多嘗試，都是失敗的，找了很多原因都不行，一直不能理解，而且很郁悶。這個(gè)學(xué)期開學(xué)，換了一個(gè)板子，一下就成功了，可能以前的硬件有點(diǎn)問題吧，只能這樣說吧。
既然DMA和FSMC都成功了，我原來也就想到既然TFT也是利用FSMC映射到STM32尋址的4G空間，那么按理說也可以用DMA的M2M進(jìn)行數(shù)據(jù)傳輸，我把液晶映射到的地址是0x68000000，但是我試了很久都是不行的，找了好久資料，好像有人說成功，可以的，我就一直郁悶，但是直到今天終于成功了。
這次測(cè)試的不是TFT，因?yàn)槲业陌遄由线@時(shí)沒有TFT，就用外部SRAM進(jìn)行了測(cè)試了。外部SRAM用FSMC總線成功了，想提高速度，節(jié)約CPU時(shí)間，讓其處理其他事情。昨晚從四點(diǎn)多一直調(diào)到了十點(diǎn)多，沒有成功，而且把我氣個(gè)半死，越來越變態(tài)的問題都發(fā)生了，比如FLASH to RAM 16bit DMA失敗，F(xiàn)LASH的數(shù)組居然存儲(chǔ)到0x00000020，而且完全錯(cuò)誤，簡(jiǎn)直是變態(tài)，本來就該0x08000000以上的地址，JLINK錯(cuò)誤,MDK 自動(dòng)關(guān)掉，那六個(gè)多小時(shí)把我快整瘋了。今天決定弄不好不吃飯，仔細(xì)對(duì)比由于是我地址宏定義寫錯(cuò)了，還有一個(gè)地方賦值錯(cuò)了，我一直沒有發(fā)現(xiàn)，因?yàn)楹芟瘛?/p>
好了就好，好了就好……
貼上我的部分關(guān)健代碼，但是百度空間不會(huì)高亮編程關(guān)鍵字，看起來不是很爽啊
//Today it is the fisrt time when I test DMA+FSMC to drive ISSI 25616 SRAM successfully
//The first time I test DMA M2M success 2010 10 14
//The first time I test FSMC to drive 9325TFT success 2010 11 4
//The first time I test FSMC to drive ISSI25616 SRAM success 2011 2 28
//by ACM不掛科 928765096
//from HDU
//2011 3 16
//Note :we can use this to drive TFT,it can save CPU time to do other things
#include"DMA_FSMC.h"
#define BufferSize 32
#define Bank1_SRAM3_ADDR ((uint32_t)0x68000000)
const uint32_t SRC_Const_Buffer[BufferSize]= {
0x01020304,0x05060708,0x090A0B0C,0x0D0E0F10,
0x11121314,0x15161718,0x191A1B1C,0x1D1E1F20,
0x21222324,0x25262728,0x292A2B2C,0x2D2E2F30,
0x31323334,0x35363738,0x393A3B3C,0x3D3E3F40,
0x41424344,0x45464748,0x494A4B4C,0x4D4E4F50,
0x51525354,0x55565758,0x595A5B5C,0x5D5E5F60,
0x61626364,0x65666768,0x696A6B6C,0x6D6E6F70,
0x71727374,0x75767778,0x797A7B7C,0x7D7E7F80};
void RCC_Config_My(void)
{
ErrorStatus HSEStartUpStatus;//The flag for test if success
RCC_HSEConfig(RCC_HSE_ON);//use extern clock
HSEStartUpStatus = RCC_WaitForHSEStartUp();//wait for HSE OK
if(HSEStartUpStatus== SUCCESS)//if it is OK
{
RCC_HCLKConfig(RCC_SYSCLK_Div1);//HCLK(AHB clock)
RCC_PCLK1Config(RCC_HCLK_Div2);//PCLK1(APB1 clock) can't over 36MHz
RCC_PCLK2Config(RCC_HCLK_Div1);//PCLK2(APB2 clock) can't over 72MHz
FLASH_SetLatency(FLASH_Latency_2);//FLASH clock control,SYSCLK0~24MHz Latency=0.SYSCLK25~48MHz Latency =1.SYSCLk 48~72MHz Latency=2
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);//
RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_9);//HSE if use for SYSTEM clock,PLL is 72MHz
RCC_PLLCmd(ENABLE);// enable PLL
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY)==RESET);//wait for PLL OK
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);//System clock is PLL clock
while(RCC_GetSYSCLKSource()!=0x08);//wait for System clock is OK
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1,ENABLE);//enable DMA1 clock
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);//enable FSMC clock
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE |
RCC_APB2Periph_GPIOF, ENABLE);
}
}
void SRAM_FSMC_Config_My(void)
{
FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
FSMC_NORSRAMTimingInitTypeDef p;
GPIO_InitTypeDef GPIO_InitStructure;
//config SRAM DATA lines configuration D0------->>D15
//please reference STC datasheet FSMC PINs Page37
//D0---->>D3 D13------->>D15
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |
GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOD, &GPIO_InitStructure);
//D4----->>D12
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |
GPIO_Pin_15;
GPIO_Init(GPIOE, &GPIO_InitStructure);
//config SRAM ADRESS lines configuration A0------->>A18
//please reference STC datasheet FSMC PINs Page37
//A0------>>A9
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 |
GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOF, &GPIO_InitStructure);
//A10---->>A15
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5;
GPIO_Init(GPIOG, &GPIO_InitStructure);
//A16------->>A18
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 ;
GPIO_Init(GPIOD, &GPIO_InitStructure);
//config SRAM NOE NWE lines configuration
//please reference STC datasheet FSMC PINs Page37
//NOE-->PD4
//NWE ----->PD5
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 |GPIO_Pin_5;
GPIO_Init(GPIOD, &GPIO_InitStructure);
//config SRAM NE3 lines configuration
//please reference STC datasheet FSMC PINs Page37
//NE4-->PG12
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
GPIO_Init(GPIOG, &GPIO_InitStructure);
//config SRAM NBL0, NBL1 lines configuration
//please reference STC datasheet FSMC PINs Page37
//NBL0(LB)-->PE0 NBL1(UB)-->PE1
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
GPIO_Init(GPIOE, &GPIO_InitStructure);
//FSMC Structure Config
p.FSMC_AddressSetupTime = 0;//The time is used for duration address set up time
p.FSMC_AddressHoldTime = 0;//The time is used for duration address hold time
p.FSMC_DataSetupTime = 2;//The time is used for duration data set up time
p.FSMC_BusTurnAroundDuration = 0;//The time is used for the duration Bus turn
p.FSMC_CLKDivision = 0;//The division of HCLK
p.FSMC_DataLatency = 0;//The time is memory clock cycle before get first data
p.FSMC_AccessMode = FSMC_AccessMode_A;//
FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;//choose FSMC bank
FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;//Address and Data line is not muxed
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;//The type of externed memory
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;//The memory data widthy
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;//disable burst access ,because this is only used for synchronous memory
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;//only used in burst mode
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; //only used in burst mode
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;//only used in burst mode
FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;//enable write
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;//only used in burst mode
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;//disable extended mode
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;//disable burst write mode
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
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