lPC1788驅(qū)動SDRAM

Sdram型號為hy57v256

#ifndef __SRAM_H_

#define __SRAM_H_

#include "common.h"

#include "delay.h"

#include "stdlib.h"

#include "debugserial.h"

#define SDRAM_DEBUG

#define SDRAM_BASE_ADDR 0xA0000000

#define SDRAM_SIZE 0x10000000

#define MHZ *10000001

#define SYS_FREQ 60//MHZ

#if SYS_FREQ == (120)

#define SDRAM_PERIOD 8.33 // 96MHz

#elif SYS_FREQ == (96)

#define SDRAM_PERIOD 10.4 // 96MHz

#elif SYS_FREQ == (72)

#define SDRAM_PERIOD 13.8 // 72MHz

#elif SYS_FREQ == (60)

#define SDRAM_PERIOD 16.67 // 60MHz

#elif SYS_FREQ == (57)

#define SDRAM_PERIOD 17.4 // 57.6MHz

#elif SYS_FREQ == (48)

#define SDRAM_PERIOD 20.8 // 48MHz

#elif SYS_FREQ == (36)

#define SDRAM_PERIOD 27.8 // 36MHz

#elif SYS_FREQ == (24)

#define SDRAM_PERIOD 41.7 // 24MHz

#elif SYS_FREQ == (12)

#define SDRAM_PERIOD 83.3 // 12MHz

#else

#error Frequency not defined

#endif

#define P2C(Period) (((Period

#define SDRAM_REFRESH 7813

#define SDRAM_TRP 20

#define SDRAM_TRAS 45

#define SDRAM_TAPR 1

#define SDRAM_TDAL 3

#define SDRAM_TWR 3

#define SDRAM_TRC 65

#define SDRAM_TRFC 66

#define SDRAM_TXSR 67

#define SDRAM_TRRD 15

#define SDRAM_TMRD 3

void sdram_io_init(void);

void sdram_init(void);

u8 sdram_text(void);

#endif

#include "sdram.h"

void sdram_io_init(void)

{

/************** init SDRAM **********/

/* init EMC_CAS */

LPC_IOCON->P2_16=0x21;

/* init EMC_RAS */

LPC_IOCON->P2_17=0x21;

/* init EMC_CLK0 */

LPC_IOCON->P2_18=0x21;

/* init EMC_DYCS0 */

LPC_IOCON->P2_20=0x21;

/* init EMC_CKE0 */

LPC_IOCON->P2_24=0x21;

/* init EMC_DQM0 */

LPC_IOCON->P2_28=0x21;

/* init EMC_DQM1 */

LPC_IOCON->P2_29=0x21;

/* init EMC_DQM2 */

LPC_IOCON->P2_30=0x21;

/* init EMC_DQM3 */

LPC_IOCON->P2_31=0x21;

/************** init SDRAM DATA PIN**********/

/* init EMC_D0 */

LPC_IOCON->P3_0=0x21;

/* init EMC_D1 */

LPC_IOCON->P3_1=0x21;

/* init EMC_D2 */

LPC_IOCON->P3_2=0x21;

/* init EMC_D3 */

LPC_IOCON->P3_3=0x21;

/* init EMC_D4 */

LPC_IOCON->P3_4=0x21;

/* init EMC_D5 */

LPC_IOCON->P3_5=0x21;

/* init EMC_D6 */

LPC_IOCON->P3_6=0x21;

/* init EMC_D7 */

LPC_IOCON->P3_7=0x21;

/* init EMC_D8 */

LPC_IOCON->P3_8=0x21;

/* init EMC_D9 */

LPC_IOCON->P3_9=0x21;

/* init EMC_D10 */

LPC_IOCON->P3_10=0x21;

/* init EMC_D11 */

LPC_IOCON->P3_11=0x21;

/* init EMC_D12 */

LPC_IOCON->P3_12=0x21;

/* init EMC_D13 */

LPC_IOCON->P3_13=0x21;

/* init EMC_D14 */

LPC_IOCON->P3_14=0x21;

/* init EMC_D15 */

LPC_IOCON->P3_15=0x21;

/* init EMC_D16 */

LPC_IOCON->P3_16=0x21;

/* init EMC_D17 */

LPC_IOCON->P3_17=0x21;

/* init EMC_D18 */

LPC_IOCON->P3_18=0x21;

/* init EMC_D19 */

LPC_IOCON->P3_19=0x21;

/* init EMC_D20 */

LPC_IOCON->P3_20=0x21;

/* init EMC_D21 */

LPC_IOCON->P3_21=0x21;

/* init EMC_D22 */

LPC_IOCON->P3_22=0x21;

/* init EMC_D23 */

LPC_IOCON->P3_23=0x21;

/* init EMC_D24 */

LPC_IOCON->P3_24=0x21;

/* init EMC_D25 */

LPC_IOCON->P3_25=0x21;

/* init EMC_D26 */

LPC_IOCON->P3_26=0x21;

/* init EMC_D27 */

LPC_IOCON->P3_27=0x21;

/* init EMC_D28 */

LPC_IOCON->P3_28=0x21;

/* init EMC_D29 */

LPC_IOCON->P3_29=0x21;

/* init EMC_D30 */

LPC_IOCON->P3_30=0x21;

/* init EMC_D31 */

LPC_IOCON->P3_31=0x21;

/************** init SDRAM ADDR PIN**********/

/* init EMC_A0 */

LPC_IOCON->P4_0=0x21;

/* init EMC_A1 */

LPC_IOCON->P4_1=0x21;

/* init EMC_A2 */

LPC_IOCON->P4_2=0x21;

/* init EMC_A3 */

LPC_IOCON->P4_3=0x21;

/* init EMC_A4 */

LPC_IOCON->P4_4=0x21;

/* init EMC_A5 */

LPC_IOCON->P4_5=0x21;

/* init EMC_A6 */

LPC_IOCON->P4_6=0x21;

/* init EMC_A7 */

LPC_IOCON->P4_7=0x21;

/* init EMC_A8 */

LPC_IOCON->P4_8=0x21;

/* init EMC_A9 */

LPC_IOCON->P4_9=0x21;

/* init EMC_A10 */

LPC_IOCON->P4_10=0x21;

/* init EMC_A11 */

LPC_IOCON->P4_11=0x21;

/* init EMC_A12 */

LPC_IOCON->P4_12=0x21;

/* init EMC_A13 */

LPC_IOCON->P4_13=0x21;

/* init EMC_A14 */

LPC_IOCON->P4_14=0x21;

/************** init SDRAM WE PIN**********/

/* init EMC_WE */

LPC_IOCON->P4_25=0x21;

}

void sdram_init(void)

{

volatile u32 i;

volatile unsigned long Dummy;

LPC_SC->PCONP|=(1<<11);//使能emc模塊

//初始化IO

sdram_io_init();

//設(shè)置命令延遲時間 芯片數(shù)據(jù)手冊上有標(biāo)準(zhǔn)

LPC_SC->EMCDLYCTL|=(8<<0);

//設(shè)置輸入數(shù)據(jù)采樣延遲

LPC_SC->EMCDLYCTL|=(8<<8);

//設(shè)置時鐘輸出延遲

LPC_SC->EMCDLYCTL|=(0x08<<16);

//使能emc 正常地址映射 正常模式非低功耗模式

LPC_EMC->Control=1;

//讀取配置設(shè)置為命令延遲策略

LPC_EMC->DynamicReadConfig=1;

//設(shè)置ras延時為3個clk cas延時為3 以下設(shè)置都需要根據(jù)SDRAM數(shù)據(jù)手冊來設(shè)置

LPC_EMC->DynamicRasCas0=0;

LPC_EMC->DynamicRasCas0|=(3<<8);

LPC_EMC->DynamicRasCas0|=(3<<0);

//設(shè)置預(yù)充電的時鐘延遲 20us

LPC_EMC->DynamicRP=P2C(20);

//設(shè)置選中到預(yù)充電