2440下的IIC實驗

#include "2440addr.h"
extern void Uart_Printf(char *fmt,...);
void Wr24C02(U32 slvAddr,U32 addr,U8 data);
void Rd24C02(U32 slvAddr,U32 addr,U8 *data);
void Run_IicPoll(void);
void IicPoll(void) ;
void Delay(int x) ;
static U8 iicData[IICBUFSIZE];
static volatile int iicDataCount;
static volatile int iicStatus;
static volatile int iicMode;
static int iicPt;

void iicMain(void)
{
unsigned int i,j;
static U8 data[256];
Uart_Printf("IIC Test(Polling) using AT24C02n");

//設(shè)置GPE15->IICSDA 和 GPE14->IICSCL
rGPEUP|= 0xc000;//Pull-up disable
rGPECON &= ~0xf0000000;
rGPECON |= 0xa0000000;//GPE15:IICSDA , GPE14:IICSCL

//Enable ACK, Prescaler IICCLK=PCLK/16, Enable interrupt, Transmit clock value Tx clock=IICCLK/16
rIICCON= (1<<7) | (0<<6) | (1<<5) | (0xf);//0xaf
rIICADD= 0x10;//2440 slave address = [7:1]
rIICSTAT = 0x10;//IIC bus data output enable(Rx/Tx)
Uart_Printf("Write test data into AT24C02n");


//寫入一個page的數(shù)據(jù)，page的大小是256byte，
//page 的起始地址是0xa0，寫入的數(shù)據(jù)是：0、1、2、...255。0xa0是AT24C02的頁地址。
//AT24C02的頁地址是0x00/0x20/0x40/0x60/0x80/0xa0/0xc0/0xe0。
for(i=0;i<256;i++)
Wr24C02(0xa0,(U8)i,i);//U32 slvAddr,U32 addr,U8 data


//初始化data數(shù)組的值為0。
for(i=0;i<256;i++)
data[i] = 0;
Uart_Printf("Read test data from AT24C02n");

//讀24C02的0xa0地址中數(shù)據(jù)到data數(shù)組中。
for(i=0;i<256;i++)
Rd24C02(0xa1,(U8)i,&(data[i]));
//輸出data數(shù)組接收數(shù)據(jù)的值
for(i=0;i<16;i++)
{
for(j=0;j<16;j++)
Uart_Printf("%2x ",data[i*16+j]);
Uart_Printf("n");
}
Uart_Printf("OK! Write data is same to Read data!n");
while(1);
}

void Wr24C02(U32 slvAddr,U32 addr,U8 data)
{
iicMode= WRDATA;
iicPt= 0;
iicData[0]= (U8)addr;
iicData[1]= data;
iicDataCount = 2;

//8-bit data shift register for IIC-bus Tx/Rx operation.
rIICDS= slvAddr;//0xa0

//Master Tx mode, Start(Write), IIC-bus data output enable
//Bus arbitration sucessful, Address as slave status flag Cleared,
//Address zero status flag cleared, Last received bit is 0
rIICSTAT= 0xf0;

//Clearing the pending bit isn't needed because the pending bit has been cleared.
while(iicDataCount!=-1)
Run_IicPoll();

iicMode = POLLACK;
while(1)
{
rIICDS= slvAddr;
iicStatus = 0x100;//To check if _iicStatus is changed
rIICSTAT= 0xf0;//Master Tx, Start, Output Enable, Sucessful, Cleared, Cleared, 0
rIICCON= 0xe0;//0xaf;//Resumes IIC operation. //hzh
while(iicStatus==0x100)
Run_IicPoll();

if(!(iicStatus & 0x1))
break;//When ACK is received
}
rIICSTAT = 0xd0;//Master Tx condition, Stop(Write), Output Enable
rIICCON= 0xe0;//0xaf;//Resumes IIC operation.//hzh
Delay(1);//Wait until stop condtion is in effect.
//Write is completed.
}

void Rd24C02(U32 slvAddr,U32 addr,U8 *data)
{
iicMode= SETRDADDR;
iicPt= 0;
iicData[0]= (U8)addr;
iicDataCount = 1;

rIICDS= slvAddr;
rIICSTAT = 0xf0;//MasTx,Start

//Clearing the pending bit isn't needed because the pending bit has been cleared.
while(iicDataCount!=-1)
Run_IicPoll();

iicMode= RDDATA;
iicPt= 0;
iicDataCount = 1;

rIICDS= slvAddr;
rIICSTAT = 0xb0;//Master Rx,Start
rIICCON= 0xe0;//0xaf;//Resumes IIC operation.
while(iicDataCount!=-1)
Run_IicPoll();

*data = iicData[1];
}

void Run_IicPoll(void)
{
if(rIICCON & 0x10)//Tx/Rx Interrupt Enable
IicPoll();
}

void IicPoll(void)
{
U32 iicSt,i;
iicSt = rIICSTAT;
if(iicSt & 0x8){};//When bus arbitration is failed. 總線仲裁失敗
if(iicSt & 0x4){};//When a slave address is matched with IICADD
if(iicSt & 0x2){};//When a slave address is 0000000b
if(iicSt & 0x1){} ;//When ACK isn't received

switch(iicMode)
{
case POLLACK:
iicStatus = iicSt;
break;

case RDDATA:
if((iicDataCount--)==0)
{
iicData[iicPt++] = rIICDS;

rIICSTAT = 0x90;//Stop MasRx condition
rIICCON= 0xc0；
Delay(1);//Wait until stop condtion is in effect.


break;
}
iicData[iicPt++] = rIICDS;
//The last data has to be read with no ack.
if((iicDataCount)==0)
rIICCON = 0x60;//0x2f;
else
rIICCON = 0xe0;//0xaf;
break;

case SETRDADDR:
if((iicDataCount--)==0)
{
break;
}
rIICDS = iicData[iicPt++];
for(i=0;i<10;i++);
rIICCON = 0xc0;
break;
default:
break;
}
}