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[導(dǎo)讀]Renesas RX630系列32位MCU開(kāi)發(fā)方案

Renesas公司的RX630系列是32位MCU,工作頻率最大為100MHz,100MHz時(shí)的性能為165 DMIPS,具有單精度32位IEEE-754浮點(diǎn),兩種類(lèi)型的乘法和累加器,工作電壓2.7V-3.6V,主要用在嵌入式系統(tǒng).本文介紹了RX630系列主要特性,方框圖,RX630系列評(píng)估板主要特性與指標(biāo),方框圖,電路圖和元件布局圖.

RX630系列主要特性:

■ 32-bit RX CPU core

 Max. operating frequency: 100 MHz

Capable of 165 DMIPS in operation at 100 MHz

 Single precision 32-bit IEEE-754 floating point

 Two types of multiply-and-accumulation unit (between memories and between registers)

 32-bit multiplier (fastest instruction execution takes one CPU clock cycle)

 Divider (fastest instruction execution takes two CPU clock cycles)

 Fast interrupt

 CISC Harvard architecture with 5-stage pipeline

 Variable-length instructions: Ultra-compact code

 Supports the memory protection unit (MPU)

 JTAG and FINE (two-line) debugging interfaces

■ Low-power design and architecture

 Operation from a single 2.7- to 3.6-V supply

 Low power consumption: A product that supports all peripheral functions draws only 500 μA/MHz.

 RTC is capable of operation from a dedicated power supply (min. operating voltage: 2.3 V).

 Four low-power modes

■ On-chip main flash memory, no wait states

 100-MHz operation, 10-ns read cycle (no wait states)

 384-Kbyte to 2-Mbyte capacities

 User code programmable via the USB, SCI, or JTAG

■ On-chip data flash memory

 Max. 32 Kbytes, reprogrammable up to 100,000 times

 Programming/erasing as background operations (BGOs)

■ On-chip SRAM, no wait states

 32- to 128-Kbyte capacities

 For instructions and operands

 Can provide backup on deep software standby

■ DMA

 DMAC: Incorporates four channels

 DTC

■ Reset and supply management

 Power-on reset (POR)

 Low voltage detection (LVD) with voltage settings

■ Clock functions

 External crystal oscillator or internal PLL for operation at 4 to 16 MHz

 Internal 125-kHz LOCO and 50-MHz HOCO

 Dedicated 125-kHz LOCO for the IWDT

 Frequency of the oscillator for sub-clock generation: 32 kHz

■ Real-time clock

 Adjustment functions (30 seconds, leap year, and error)

 Time capture function (for capturing times in response to event-signal input on external pins)

■ Independent watchdog timer

 125-kHz LOCO clock operation

■ Useful functions for IEC60730 compliance

 Oscillation-stop detection, frequency measurement, CRC, IWDT, self-diagnostic function for the A/D converter, etc.

■ Up to 22 communications interfaces

 USB 2.0 full-speed function interface (1 channel)

 CAN (compliant with ISO11898-1), incorporating 32 mailboxes (up to 3 channels)

 SCI with multiple functionalities (up to 13 channels)

Choose from among asynchronous mode, clock-synchronous mode, smart-card interface mode, simple SPI, simple I2C, and extended serial mode.

 I2C bus interface for transfer at up to 1 Mbps (up to 4 channels)

 RSPI for high-speed transfer (up to 3 channels)

■ External address space

 8 CS areas (8 × 16 Mbytes)

 Multiplexed address data or separate address lines are selectable per area.

 8-, 16-, or 32-bit bus space is selectable per area

■ Up to 20 extended-function timers

 16-bit MTU2: input capture, output capture, complementary PWM output, phase-counting mode (6 channels)

 16-bit TPU: input capture, output capture, phase-counting mode (12 channels)

 8-bit TMR (4 channels)

 16-bit compare-match timers (4 channels)

■ A/D converter for 1-MHz Operation

 Up to 21 12-bit channels, and incorporating 1 sample-and-hold circuit

 Up to 8 10-bit channels, and incorporating 1 sample-and-hold circuit

 Addition of results of A/D conversion (in the 12-bit A/D converter)

 Self diagnosis (for the 10-bit A/D converter)

■ 10-bit D/A converter: 2 channels

■ Temperature sensor for measuring temperature within the chip

■ Register write protection function can protect values in important registers against overwriting.

■ Up to 148 pins for GPIO

 5-V tolerance, open drain, input pull-up, switchable driving ability

■ Operating temp. range

 –40 degree C to +85 degree C[!--empirenews.page--]

 

 

圖1.RX630系列方框圖

RX630系列評(píng)估板

The Renesas Starter Kit for RX630 is intended as a user-friendly introductory and evaluation tool for the RX630 microcontroller. The kit also provides a useful platform for evaluating the Renesas suite of development tools for coding and debugging. This includes a choice of IDEs between the High-performance Embedded Workshop and e2studio.

The Renesas Starter Kit for RX630 may be connected to the host PC using a simple RS232 serial connection or via the included USB E1 on chip debugging interface.

The purpose of the board is to enable the user to evaluate the capabilities of the device and its peripherals by giving the user a simple platform on which code can be run only minutes from opening box. It can also prove an invaluable tool in development by providing a useful test platform for code already debugged using one of our more powerful emulation tools.

This RSK is an evaluation tool for Renesas microcontrollers. This manual describes the technical details of the RSK hardware. The Quick Start Guide and Tutorial Manual provide details of the software installation and debugging environment.

RX630系列評(píng)估板主要特性:

This RSK provides an evaluation of the following features:

 Renesas microcontroller programming

 User code debugging

 User circuitry such as switches, LEDs and a potentiometer

 Sample application

 Sample peripheral device initialisation code

The RSK board contains all the circuitry required for microcontroller operation.

 

 

圖2.RX630系列評(píng)估板方框圖

The LCD display module is supplied as a detachable sub-board. The board dimensions are 120 mm by 100 mm, detailed dimensions are available in the user manual.

 

 

圖3.RX630系列評(píng)估板元件布局圖

RX630系列評(píng)估板主要指標(biāo):

 

圖4.RX630系列評(píng)估板外形圖

 

 

圖5.RX630系列評(píng)估板電路圖(1)

 

 

圖6.RX630系列評(píng)估板電路圖(2)

 

 

圖7.RX630系列評(píng)估板電路圖(3)

 

 

圖8.RX630系列評(píng)估板電路圖(4)

 

 

圖9.RX630系列評(píng)估板電路圖(5)

 

 

圖10.RX630系列評(píng)估板電路圖(6)

 

 

圖11.RX630系列評(píng)估板元件布局圖:頂層

 

 

圖12.RX630系列評(píng)估板元件布局圖:底層

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