Maxim DS1878高頻光收發(fā)參考設(shè)計HFRD-49.1

Maxim 公司的DS1878是集成數(shù)字LDD接口的SFP+控制器，可以控制和監(jiān)視SFF, SFP和SFP+ 模塊所有的功能，包括所有的SFF-8472功能，支持基于VCSEL, DFB和EML的解決方案。工作電壓為+2.85V 到+5.5V，主要用在SFF, SFP和SFP+收發(fā)器模塊。本文介紹了DS1878主要特性，方框圖，高頻光收發(fā)參考設(shè)計HFRD-49.1主要特性，參考設(shè)計HFRD-49.1和HFRD-30.1主PCB方框圖，參考設(shè)計HFRD-49.1電路圖和材料清單。

DS1878：SFP+ Controller with Digital LDD Interface

The DS1878 controls and monitors all functions for SFF, SFP, and SFP+ modules including all SFF-8472 functionality.

The combination of the DS1878 with Maxim laser driver/limiting amplifier solutions supports VCSEL, DFB, and EML-based solutions. The device provides APC loop, modulation current control, and eye safety functionality. It continuously monitors for high output current, high bias current, and low and high transmit power to ensure that laser shutdown for eye safety requirements are met without adding external components.

Six ADC channels monitor VCC, temperature, and four external monitor inputs (MON1–MON4) that can be used to meet all monitoring requirements.

MON3 is differential with support for common mode to VCC. Two digital-to-analog (DAC) outputs with temperature- indexed lookup tables (LUTs) are available for additional control functionality.

DS1878主要特性：

♦ Meets All SFF-8472 Control and Monitoring Requirements

♦ Laser Bias Controlled by APC Loop and

Temperature LUT to Compensate for Tracking Error

♦ Laser Modulation Controlled by Temperature LUT

♦ Six Analog Monitor Channels: Temperature, VCC, MON1–MON4

MON1–MON4 Support Internal and External Calibration

Scalable Dynamic Range

Internal Direct-to-Digital Temperature Sensor

Alarm and Warning Flags for All Monitored Channels

♦ Two 9-Bit Delta-Sigma Outputs with 36 Entry Temperature LUTs

♦ Digital I/O Pins: Five Inputs, Four Outputs

♦ Comprehensive Fault-Measurement System with Maskable Laser Shutdown Capability

♦ Flexible, Two-Level Password Scheme Provides Three Levels of Security

♦ 256 Additional Bytes Located at A0h Slave Address

♦ I2C-Compatible Interface

♦ 3-Wire Master to Communicate with a Maxim Laser Driver/Limiting Amplifier

♦ +2.85V to +5.5V Operating Voltage Range

♦ -40℃ to +95℃ Operating Temperature Range

♦ 28-Pin TQFN (5mm x 5mm x 0.75mm) Package

DS1878應(yīng)用：

SFF, SFP, and SFP+ Transceiver Modules

圖1。DS1878方框圖

Reference Design HFRD-49.1

High-Frequency Reference Design (HFRD-49.1) is an optical transceiver presented in the SFP+ form factor for demonstrating the operation of Maxim’s MAX3946 laser driver, the MAX3945 limiting amplifier, and the DS1878 controller.

The MAX3946 is optimized to drive a differential transmitter optical subassembly (TOSA),containing a DFB or FP laser, through a 25Ω flex circuit. The unique design of the output stage enables use of unmatched TOSAs, greatly reducing headroom limitations and lowering power consumption.

The MAX3945 limiting amplifier is optimized to provide standards-compliant sensitivity at data rates of either 1.25Gbps or 10.3125Gbps. All differential inputs and outputs (I/Os) are optimally back terminated for 50Ω transmission line printed circuit board (PCB) design. The MAX3945’s dualpath limiting amplifier has programmable filtering to optimize sensitivity for different data rates and to suppress relaxation oscillations that could occur in some optical systems. The MAX3945 incorporates two loss-of-signal (LOS) circuits and a programmable time mask for the LOS output.

Maxim’s DS1878 state machine controller provides the 3-wire interface to both the MAX3945 and the MAX3946. Communication with the SFP+ module is accomplished through the standard MSA I2C interface offered on the DS1878. The DS1878 provides all the necessary diagnostics and register locations to establish SFF-8472 compliance.

圖2。參考設(shè)計HFRD-49.1外形圖

The laser driver portion features:

1 Waveform peaking

2 Pulse-width fine adjustment

3 Control of bias and modulation

4 Input equalization

5 Driver back termination

6 Fully differential drive

7 Up to 80mA modulation

8 Fault-detection capability

The limiting amplifier portion features:

1. Adjustable-output CML level

2. Input-bandwidth select feature

3. Output pre-emphasis enable

4. 5mV input sensitivity

5. LOS polarity/squelch

6. Programmable LOS level

圖3。參考設(shè)計HFRD-49.1電路圖

圖4。參考設(shè)計HFRD-49.1和HFRD-30.1主PCB方框圖
參考設(shè)計HFRD-49.1材料清單（BOM）：


圖5。參考設(shè)計HFRD-49.1 PCB元件布局圖
詳情請見：
http://datasheets.maxim-ic.com/en/ds/DS1878.pdf
和
http://pdfserv.maxim-ic.com/en/an/AN4794.pdf