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[導(dǎo)讀] //-----------------------------------------------------------------------------//Includes//-----------------------------------------------------------------------------#include//SFRdeclar

//-----------------------------------------------------------------------------
//Includes
//-----------------------------------------------------------------------------
#include//SFRdeclarations

#include

//-----------------------------------------------------------------------------
//16-bitSFRDefinitionsfor’F00x
//-----------------------------------------------------------------------------

sfr16DP=0x82;//datapointer
sfr16TMR3RL=0x92;//Timer3reloadvalue
sfr16TMR3=0x94;//Timer3counter
sfr16ADC0=0xbe;//ADC0data
sfr16ADC0GT=0xc4;//ADC0greaterthanwindow
sfr16ADC0LT=0xc6;//ADC0lessthanwindow
sfr16RCAP2=0xca;//Timer2capture/reload
sfr16T2=0xCC;//Timer2
sfr16DAC0=0xd2;//DAC0data
sfr16DAC1=0xd5;//DAC1data
//-----------------------------------------------------------------------------
//FunctionPROTOTYPES
//-----------------------------------------------------------------------------
voidSYSCLK_Init(void);
//-----------------------------------------------------------------------------
//MAINRoutine
//-----------------------------------------------------------------------------

voidmain(void){
WDTCN=0xde;//dISAblewatchdogtimer
WDTCN=0xad;
SYSCLK_Init();//initializeoscillator
REF0CN=0x03;//ReferenceControlRegister
//----------------------------------------------------------------------------
//DACConfiguration
//----------------------------------------------------------------------------
DAC0CN=0x80;//DAC0ControlRegister
DAC1CN=0x80;//DAC1ControlRegister
while(1)
{
DAC0L=0xAB;//DAC0LowByteRegister
DAC0H=0x0C;//DAC0HighByteRegister
DAC1L=0xAB;//DAC1LowByteRegister
DAC1H=0x0C;//DAC1HighByteRegister
}
}
//-----------------------------------------------------------------------------
//InitializationSubroutines
//-----------------------------------------------------------------------------

//-----------------------------------------------------------------------------
//OscillatorConfiguration
//-----------------------------------------------------------------------------
voidSYSCLK_Init(void)
{
inti;//delaycounter

OSCXCN=0x67;//startexternaloscillatorwith
//18.432MHzcrystal

for(i=0;i<256;i++);//XTLVLDblankinginterval(>1ms)

while(!(OSCXCN&0x80));//Waitforcrystalosc.tosettle

OSCICN=0x88;//selectexternaloscillatorasSYSCLK
//sourceandenablemissingcLOCk
//detector
}


/*---------------------------------------------------------------------------
;
;
;
;
; FILE NAME : C8051F000.h
; TARGET MCUs: C8051F000, 'F001, 'F002, 'F010, 'F011, 'F012, 'F005, 'F006,
; 'F007, 'F015, 'F016 and 'F017
; DESCRIPTION: Register/bit definitions for the C8051Fxxx family.
;
; REVISION 1.9
;---------------------------------------------------------------------------*/

/* BYTE Registers */
sfr P0 = 0x80;/* PORT 0 */
sfr SP = 0x81;/* STACK POINTER */
sfr DPL = 0x82;/* DATA POINTER - LOW BYTE */
sfr DPH = 0x83;/* DATA POINTER - HIGH BYTE */
sfr PCON = 0x87;/* POWER CONTROL */
sfr TCON = 0x88;/* TIMER CONTROL */
sfr TMOD = 0x89;/* TIMER MODE */
sfr TL0 = 0x8A;/* TIMER 0 - LOW BYTE */
sfr TL1 = 0x8B;/* TIMER 1 - LOW BYTE */
sfr TH0 = 0x8C;/* TIMER 0 - HIGH BYTE */
sfr TH1 = 0x8D;/* TIMER 1 - HIGH BYTE */
sfr CKCON = 0x8E;/* CLOCK CONTROL */
sfr PSCTL = 0x8F;/* PROGRAM STORE R/W CONTROL */
sfr P1 = 0x90;/* PORT 1 */
sfr TMR3CN = 0x91;/* TIMER 3 CONTROL */
sfr TMR3RLL = 0x92;/* TIMER 3 RELOAD REGISTER - LOW BYTE */
sfr TMR3RLH = 0x93;/* TIMER 3 RELOAD REGISTER - HIGH BYTE */
sfr TMR3L = 0x94;/* TIMER 3 - LOW BYTE */
sfr TMR3H = 0x95;/* TIMER 3 - HIGH BYTE */
sfr SCON = 0x98;/* SERIAL PORT CONTROL */
sfr SBUF = 0x99;/* SERIAL PORT BUFFER */
sfr SPI0CFG = 0x9A;/* SERIAL PERIPHERAL INTERFACE 0 CONFIGURATION */
sfr SPI0DAT = 0x9B;/* SERIAL PERIPHERAL INTERFACE 0 DATA */
sfr SPI0CKR = 0x9D;/* SERIAL PERIPHERAL INTERFACE 0 CLOCK RATE CONTROL */
sfr CPT0CN = 0x9E;/* COMPARATOR 0 CONTROL */
sfr CPT1CN = 0x9F;/* COMPARATOR 1 CONTROL */
sfr P2 = 0xA0;/* PORT 2 */
sfr PRT0CF = 0xA4;/* PORT 0 CONFIGURATION */
sfr PRT1CF = 0xA5;/* PORT 1 CONFIGURATION */
sfr PRT2CF = 0xA6;/* PORT 2 CONFIGURATION */
sfr PRT3CF = 0xA7;/* PORT 3 CONFIGURATION */
sfr IE = 0xA8;/* INTERRUPT ENABLE */
sfr PRT1IF = 0xAD;/* PORT 1 EXTERNAL INTERRUPT FLAGS */
sfrEMI0CN = 0xAF; /* EXTERNAL MEMORY INTERFACE CONTROL */
sfr P3 = 0xB0;/* PORT 3 */
sfr OSCXCN = 0xB1;/* EXTERNAL OSCILLATOR CONTROL */
sfr OSCICN = 0xB2;/* INTERNAL OSCILLATOR CONTROL */
sfr FLSCL = 0xB6;/* FLASH MEMORY TIMING PRESCALER */
sfr FLACL = 0xB7;/* FLASH ACESS LIMIT */
sfr IP = 0xB8;/* INTERRUPT PRIORITY */
sfr AMX0CF = 0xBA;/* ADC 0 MUX CONFIGURATION */
sfr AMX0SL = 0xBB;/* ADC 0 MUX CHANNEL SELECTION */
sfr ADC0CF = 0xBC;/* ADC 0 CONFIGURATION */
sfr ADC0L = 0xBE;/* ADC 0 DATA - LOW BYTE */
sfr ADC0H = 0xBF;/* ADC 0 DATA - HIGH BYTE */
sfr SMB0CN = 0xC0;/* SMBUS 0 CONTROL */
sfr SMB0STA = 0xC1;/* SMBUS 0 STATUS */
sfr SMB0DAT = 0xC2;/* SMBUS 0 DATA */
sfr SMB0ADR = 0xC3;/* SMBUS 0 SLAVE ADDRESS */
sfr ADC0GTL = 0xC4;/* ADC 0 GREATER-THAN REGISTER - LOW BYTE */
sfr ADC0GTH = 0xC5;/* ADC 0 GREATER-THAN REGISTER - HIGH BYTE */
sfr ADC0LTL = 0xC6;/* ADC 0 LESS-THAN REGISTER - LOW BYTE */
sfr ADC0LTH = 0xC7;/* ADC 0 LESS-THAN REGISTER - HIGH BYTE */
sfr T2CON = 0xC8;/* TIMER 2 CONTROL */
sfr RCAP2L = 0xCA;/* TIMER 2 CAPTURE REGISTER - LOW BYTE */
sfr RCAP2H = 0xCB;/* TIMER 2 CAPTURE REGISTER - HIGH BYTE */
sfr TL2 = 0xCC;/* TIMER 2 - LOW BYTE */
sfr TH2 = 0xCD;/* TIMER 2 - HIGH BYTE */
sfr SMB0CR = 0xCF;/* SMBUS 0 CLOCK RATE */
sfr PSW = 0xD0;/* PROGRAM STATUS WORD */
sfr REF0CN = 0xD1;/* VOLTAGE REFERENCE 0 CONTROL */
sfr DAC0L = 0xD2;/* DAC 0 REGISTER - LOW BYTE */
sfr DAC0H = 0xD3;/* DAC 0 REGISTER - HIGH BYTE */
sfr DAC0CN = 0xD4;/* DAC 0 CONTROL */
sfr DAC1L = 0xD5;/* DAC 1 REGISTER - LOW BYTE */
sfr DAC1H = 0xD6;/* DAC 1 REGISTER - HIGH BYTE */
sfr DAC1CN = 0xD7;/* DAC 1 CONTROL */
sfr PCA0CN = 0xD8;/* PCA 0 COUNTER CONTROL */
sfr PCA0MD = 0xD9;/* PCA 0 COUNTER MODE */
sfr PCA0CPM0 = 0xDA;/* CONTROL REGISTER FOR PCA 0 MODULE 0 */
sfr PCA0CPM1 = 0xDB;/* CONTROL REGISTER FOR PCA 0 MODULE 1 */
sfr PCA0CPM2 = 0xDC;/* CONTROL REGISTER FOR PCA 0 MODULE 2 */
sfr PCA0CPM3 = 0xDD;/* CONTROL REGISTER FOR PCA 0 MODULE 3 */
sfr PCA0CPM4 = 0xDE;/* CONTROL REGISTER FOR PCA 0 MODULE 4 */
sfr ACC = 0xE0;/* ACCUMULATOR */
sfr XBR0 = 0xE1;/* DIGITAL CROSSBAR CONFIGURATION REGISTER 0 */
sfr XBR1 = 0xE2;/* DIGITAL CROSSBAR CONFIGURATION REGISTER 1 */
sfr XBR2 = 0xE3;/* DIGITAL CROSSBAR CONFIGURATION REGISTER 2 */
sfr EIE1 = 0xE6;/* EXTERNAL INTERRUPT ENABLE 1 */
sfr EIE2 = 0xE7;/* EXTERNAL INTERRUPT ENABLE 2 */
sfr ADC0CN = 0xE8;/* ADC 0 CONTROL */
sfr PCA0L = 0xE9;/* PCA 0 TIMER - LOW BYTE */
sfr PCA0CPL0 =0xEA; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 0 - LOW BYTE */
sfr PCA0CPL1 =0xEB; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 1 - LOW BYTE */
sfr PCA0CPL2 =0xEC; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 2 - LOW BYTE */
sfr PCA0CPL3 =0xED; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 3 - LOW BYTE */
sfr PCA0CPL4 =0xEE; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 4 - LOW BYTE */
sfr RSTSRC =0xEF; /* RESET SOURCE */
sfr B =0xF0; /* B REGISTER */
sfr EIP1 =0xF6; /* EXTERNAL INTERRUPT PRIORITY REGISTER 1 */
sfr EIP2 =0xF7; /* EXTERNAL INTERRUPT PRIORITY REGISTER 2 */
sfr SPI0CN =0xF8; /* SERIAL PERIPHERAL INTERFACE 0 CONTROL */
sfr PCA0H =0xF9; /* PCA 0 TIMER - HIGH BYTE */
sfr PCA0CPH0 =0xFA; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 0 - HIGH BYTE */
sfr PCA0CPH1 =0xFB; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 1 - HIGH BYTE */
sfr PCA0CPH2 =0xFC; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 2 - HIGH BYTE */
sfr PCA0CPH3 =0xFD; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 3 - HIGH BYTE */
sfr PCA0CPH4 =0xFE; /* CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 4 - HIGH BYTE */
sfr WDTCN =0xFF; /* WATCHDOG TIMER CONTROL */

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