外媒：數(shù)字電源在應(yīng)對(duì)摩爾定律挑戰(zhàn)中至關(guān)重要

數(shù)字電源在應(yīng)對(duì)摩爾定律挑戰(zhàn)中至關(guān)重要0' title='外媒：數(shù)字電源在應(yīng)對(duì)摩爾定律挑戰(zhàn)中至關(guān)重要0' />

元器件交易網(wǎng)訊 11月8日消息，據(jù)外媒EETasia分析，摩爾定律幾年后就將走到盡頭，屆時(shí)芯片制造將會(huì)面臨諸多障礙，全面采用數(shù)字電源將變得至關(guān)重要。

摩爾定律即將走到盡頭。有報(bào)道稱距摩爾定律終結(jié)看起來似乎還有幾十年，現(xiàn)在僅剩幾年的光景了。摩爾定律稱晶體管密度每?jī)赡攴槐丁?/p>

臺(tái)積電最小芯片工藝制程為20nm，稱其“相比28nm技術(shù)，密度提升1.9倍，速度提升30%，而能耗降低25%”。英特爾稱也擁有同樣的20nm的制造工藝。

節(jié)點(diǎn)收縮到這個(gè)程度造成了許多障礙。下面我們來看看數(shù)字電源在應(yīng)對(duì)摩爾定律帶來的挑戰(zhàn)時(shí)扮演的角色，推動(dòng)它在很多應(yīng)用領(lǐng)域從推薦技術(shù)變成必須技術(shù)。

在過去的十年中，伴隨其重要性的提升，數(shù)字電源應(yīng)用的數(shù)量也在穩(wěn)步增長(zhǎng)。當(dāng)數(shù)字電源全面應(yīng)用時(shí)，將允許設(shè)計(jì)師動(dòng)態(tài)地調(diào)整電源軌來迅速提升開發(fā)周期，并能通過實(shí)時(shí)接受遙測(cè)數(shù)據(jù)來幫助設(shè)計(jì)師們準(zhǔn)確地分析電源設(shè)備的情況。

通常，這需要一個(gè)完整的、同時(shí)涉及硬件及軟件的系統(tǒng)的解決方案。更換數(shù)字電源將會(huì)為公司帶來難以置信的好處和獨(dú)特的優(yōu)勢(shì)，但是大多數(shù)公司同樣擁有實(shí)施系統(tǒng)管理的設(shè)備和資源。

如果沒有合適的信息及合作者來一同工作，全面應(yīng)用數(shù)字電源未必是一個(gè)簡(jiǎn)單的任務(wù)。因此，全面推進(jìn)數(shù)字電源系統(tǒng)要比市場(chǎng)預(yù)期慢一些。

雖然大多數(shù)數(shù)字電源廠商試圖推動(dòng)全面的系統(tǒng)解決方案，事實(shí)上僅僅更換一個(gè)插口都會(huì)創(chuàng)造難以形容的價(jià)值。大量芯片對(duì)功率都有極端的要求，需要在1V的情況下獲得50安、70安、甚至100安的電流來處理較大的電壓瞬變以及容差極小的輸出。

數(shù)字降壓點(diǎn)負(fù)載，像可兼容電源管理總線的NDM2Z系列DC/DC轉(zhuǎn)換模塊包含了電源管理特性，比如電壓排序、電壓裕度、電壓跟蹤等，幫助設(shè)計(jì)師動(dòng)態(tài)的優(yōu)化其電源系統(tǒng)。

通常情況下，這些功率需求由處理器來處理，但是現(xiàn)在這項(xiàng)工作轉(zhuǎn)移到其他主流和專用IC上。對(duì)于高集成數(shù)字降壓點(diǎn)負(fù)載(POL)，這些都是完美的方案。

“推薦、強(qiáng)烈推薦、必需”這樣的字眼不斷出現(xiàn)在數(shù)據(jù)表和市場(chǎng)營(yíng)銷材料上。但不幸的是沒有任何一個(gè)IEEE（工程協(xié)會(huì)）定義這些字眼，用戶還要自己理解這些廠商的意思。

最重要的是，沒人愿意在技術(shù)文檔中使用這個(gè)詞語。因?yàn)樗P(guān)乎一部分解決方案并且可能被對(duì)手利用來與其競(jìng)爭(zhēng)。例如，在以上兩個(gè)場(chǎng)景中，將數(shù)字電源推薦給功率需求極端的系統(tǒng)或芯片可能會(huì)被考慮。這么做更為簡(jiǎn)單直接，不是么？

以下為原文：

Digital power vital as chip architectures become smaller

Moore's Law is set to come to an end. The end of Moore's Law, where transistor density doubles approximately every two years, has been reportedly just a few years away for what seems like decades now.

TSMC's smallest architecture is a 20nm process, which it claims has "30 per cent higher speed, 1.9 times the density, or 25 per cent less power [compared with] its 28nm technology." Intel is claiming similar process geometries.0

Shrinking nodes to this level creates several difficulties. Here we look at the role digital power is playing to help address some of the challenges brought on by Moore's Law, moving it from a recommended to a required technology in many new applications.

The importance and number of implementations of digital power have been growing steadily over the past decade and, when fully implemented, it allows users to dynamically adjust power rails to improve efficiency, quickly make changes during development to shorten design cycles, and receive real-time telemetry to let users accurately analyse their power infrastructure.

Typically, this has entailed a complete system level solution involving both hardware and software implementation. The companies that have made the transition to digital power have seen incredible benefits and realised a distinct advantage, but the majority of these companies have also had the infrastructure and resources to manage an implementation at the system level.

This type of implementation is not necessarily a trivial task without having proper information and partners to work with. Thus, the move to a fully-digital power system has been slower than the market had hoped.

While the majority of the vendors in the digital power market have tried to drive the value of a complete system solution, the fact is that it can also provide incredible value at just a single socket level. There are now numerous chips with extreme power requirements of 50A, 70A, or even over 100A at 1V, capable of handling significant transients and very tight tolerances on output.

Typically these challenging power requirements have resided at the processor, but they are now migrating to other mainstream and application-specific ICs. These are perfect scenarios for a highly integrated digital POL.

Digital POLs such as the PMBus-compatible NDM2Z series DC/DC converter module incorporate power management features like voltage sequencing, voltage margining, and voltage tracking to help designers dynamically optimise their power systems.

"Recommended, highly recommended and required' are terms that are consistently thrown about in datasheets and marketing materials at all levels. Unfortunately, there isn't an IEEE definition for these terms, and it is up to the user to interpret the vendor's meaning.[!--empirenews.page--]

For the most part, no one likes to use the word required in their technical documentation because that locks it in as part of the solution and could potentially be used against them by their competitors. For example, in the two scenarios above, it could be considered that digital power is recommended for a system and highly recommended for those chips with the extreme power requirements. Simple and straightforward, right?